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Field-programmable gate arrays (FPGAs)
Field-programmable gate arrays (FPGAs)

While advanced wireless communication seamlessly connects hundreds of thousands of edge devices to the edge cloud, traditional homogenous edge-cloud platforms struggle mightily to handle diverse workloads and computation models efficiently. Now, two researchers from the UMass Amherst Electrical and Computer Engineering (ECE) Department have received a four-year, $799,999 award from the National Science Foundation (NSF) to support a pioneering approach to this thorny efficiency issue by using field-programmable gate arrays (FPGAs) within an edge-overlay framework. The two ECE researchers are the principal investigator (PI), Professor Sandip Kundu, and co-PI Professor Russell Tessier, the ECE department head. 

An FPGA is a type of integrated circuit that users can program to perform many specific tasks. As Kundu and Tessier explain in their NSF abstract, “FPGAs can be dynamically reconfigured to act as various processing units, efficiently handling these diverse computational needs. The main goal of this research is to develop novel techniques for offloading heterogeneous tasks, ensuring high overall throughput, uninterrupted service, and fault tolerance.” 

The NSF research promises to resolve the burgeoning challenge for edge-cloud computing “of ever-growing diversity of edge devices, from central processing units for basic tasks, to graphics processing units for graphics, and neural processing units for machine learning,” as Kundu and Tessier observe. 

To demonstrate the effectiveness of the proposed techniques, Kundu and Tessier’s NSF research will focus on a case involving the use of drone-network surveillance. The approach they are developing has the potential to enrich edge computing's energy efficiency, resiliency, and scalability by significant measures.

In addition to this leading-edge research, Kundu and Tessier explain that their project “will make a significant contribution by making powerful edge-cloud computing more accessible. To achieve this, the researchers will develop new course modules at UMass and Worcester Polytechnic Institute (WPI) focused on heterogeneous edge computing, institute a research workshop for sharing research ideas and showcasing work, and leverage targeted programs to recruit underrepresented students to research programs.”

Kundu and Tessier’s collaborator at WPI is Associate Professor Tian Guo of the Department of Computer Science and the PI for the WPI side of the project. 

As the NSF abstract concludes, “These initiatives will empower undergraduate and graduate students to leverage edge-cloud FPGA resources for various hardware and software experiments. The annual research workshop, organized and executed by graduate students, will be open to the wider community, further expanding the project's reach and impact.” 

In addition, the researchers will openly share all findings, innovations, and software developed from this research to ensure that these results are freely accessible and usable by the research community, industry partners, and the public, thus promoting collaboration, further development, and practical applications.

Kundu’s Advanced VLSI Design and Test Group (see Research) is involved in a number of projects covering a large spectrum of microarchitecture, hardware security, neural processing, and VLSI design and test research. Tessier’s Reconfigurable Computing Group is mainly focused on reconfigurable computing, FPGAs, and embedded systems. WPI’s Guo is an expert in designing computing mechanisms and policies that balance cost, performance, and efficiency for emerging applications. 

Article posted in Research