Pavan Panchapakeshan

History

Member for: 12 years 3 months

Publications

Variability in Nanoscale Fabrics: Bottom-up Integrated Analysis and Mitigation

Pritish Narayanan, Michael Leuchtenburg, Jorge Kina, Prachi Joshi, Pavan Panchapakeshan, Chi On Chui, Csaba Andras Moritz

ACM Journal on Emerging Technologies in Computing Systems (JETC) , Vol. No. 9 , Issue No. 1 , 2013 , PDF
FastTrack: Towards Nanoscale Fault Masking with High Performance

MD Muwyid Khan, Pritish Narayanan, Prachi Joshi, Michael Leuchtenburg, Pavan Panchapakeshan, Csaba Andras Moritz

IEEE Transactions on Nanotechnology , Vol. No. 11 , Issue No. 4 , pp. 720-730 , 2012 , PDF
Integrated Device-Fabric Explorations and Noise Mitigation in Nanoscale Fabrics

Pritish Narayanan, Jorge Kina, Pavan Panchapakeshan, Chi On Chui, Csaba Andras Moritz

IEEE Transactions on Nanotechnology , Vol. No. 11 , Issue No. 4 , pp. 687-700 , 2012 , PDF
Nanoscale Application Specific Integrated Circuits

Pritish Narayanan, Jorge Kina, Pavan Panchapakeshan, Priyamvada Vijayakumar, K.-S. Shin, Mostafizur Rahman, Michael Leuchtenburg, Israel Koren, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 99-106 , 2011 , PDF
N3ASICs: Designing Nanofabrics with Fine-Grained CMOS Integration

Pavan Panchapakeshan, Pritish Narayanan, Csaba Andras Moritz

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch) , pp. 196-202 , 2011 , PDF
Integrated Nanosystems with Junctionless Crossed Nanowire Transistors

Pritish Narayanan, Pavan Panchapakeshan, Jorge Kina, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 845-848 , 2011 , PDF
3-D Integration Requirements for Hybrid Nanoscale-CMOS Fabrics

Pavan Panchapakeshan, Priyamvada Vijayakumar, Pritish Narayanan, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO) , pp. 849-853 , 2011 , PDF
Parameter Variability in Nanoscale Fabrics: Bottom-Up Integrated Exploration

Pritish Narayanan, Michael Leuchtenburg, Jorge Kina, Prachi Joshi, Pavan Panchapakeshan, Chi On Chui, Csaba Andras Moritz

in Proceedings of IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT) , pp. 24-31 , 2010 , PDF