Nanoscale Computing Fabrics Lab - SRC TECHCON https://www.umass.edu/nanofabrics/conferencejournalbook/src-techcon en Integrated Nanowire Systems for Post-CMOS Computing https://www.umass.edu/nanofabrics/publication/integrated-nanowire-systems-post-cmos-computing <div class="field field-name-field-authors field-type-user-reference field-label-hidden view-mode-rss"><div class="field-items"><div class="field-item even"><a href="/nanofabrics/users/mostafizur-rahman">Mostafizur Rahman</a></div><div class="field-item odd"><a href="/nanofabrics/users/pritish-narayanan">Pritish Narayanan</a></div><div class="field-item even"><a href="/nanofabrics/users/andras">Csaba Andras Moritz</a></div></div></div><div class="field field-name-field-year-of-publication field-type-date field-label-hidden view-mode-rss"><div class="field-items"><div class="field-item even"><span class="date-display-single" property="dc:date" datatype="xsd:dateTime" content="2012-01-01T00:00:00-05:00">2012</span></div></div></div><section class="field field-name-body field-type-text-with-summary field-label-above view-mode-rss"><h2 class="field-label">Abstract:&nbsp;</h2><div class="field-items"><div class="field-item even" property="content:encoded"><p>CMOS faces new device and technology challenges: MOSFETs require ultra-sharp doping profiles and complex processing; integration of devices into circuits requires arbitrary interconnection with overlay precision beyond known manufacturing solutions (3σ=±3nm, 16nm CMOS, ITRS’11[1]). To overcome these challenges, we propose a new nanoscale computing fabric with integrated design of device, interconnect and circuits to minimize manufacturing requirements while providing ultra-dense, high-performance, and low-power solution surpassing scaled CMOS. Devices with uniform doping profiles, regular arrays tolerant to mask misalignment and novel circuits with limited customization are discussed. Device evaluations prove that proposed devices simplify manufacturing complexity vs. CMOS while being competitive (I<sub>ON</sub> = 14µA, I<sub>ON</sub>/I<sub>OFF</sub> &gt; 10<sup>6</sup>). Simulations show 100% yield at overlay imprecision as high as 3σ=±8nm (manufacturing solutions known, ITRS’11[1]). Benchmarking of processor design vs. equivalent 16nm CMOS shows 3x density, 5x power benefits at comparable performance. Memory benchmarking shows 35x leakage power, 3x performance improvement over 16nm<br /> SRAM. </p> </div></div></section><div class="field field-name-field-publication-files field-type-file field-label-hidden view-mode-rss"><div class="field-items"><div class="field-item even"><span class="file"><img class="file-icon" alt="PDF icon" title="application/pdf" src="/nanofabrics/modules/file/icons/application-pdf.png" /> <a href="https://www.umass.edu/nanofabrics/sites/default/files/TECHCON_Rahman_2012.pdf" type="application/pdf; length=773988" title="TECHCON_Rahman_2012.pdf">PDF</a></span></div></div></div><div class="field field-name-field-research-category field-type-taxonomy-term-reference field-label-hidden view-mode-rss"><ul class="field-items"><li class="field-item even"><a href="/nanofabrics/publication-categories/nanoarchitecturedevicescircuits" typeof="skos:Concept" property="rdfs:label skos:prefLabel" datatype="">Nanoarchitecture/Devices/Circuits</a></li><li class="field-item odd"><a href="/nanofabrics/publication-categories/nanomanufacturing" typeof="skos:Concept" property="rdfs:label skos:prefLabel" datatype="">Nanomanufacturing</a></li><li class="field-item even"><a href="/nanofabrics/publication-categories/nanowires" typeof="skos:Concept" property="rdfs:label skos:prefLabel" datatype="">Nanowires</a></li></ul></div><section class="field field-name-field-related-projects field-type-node-reference field-label-above view-mode-rss"><h2 class="field-label">Related Projects:&nbsp;</h2><div class="field-items"><div class="field-item even"><a href="/nanofabrics/project/nanoscale-application-specific-integrated-circuits-nasic-n3asic-nwram">Nanoscale Application Specific Integrated Circuits (NASIC, N3ASIC, NWRAM)</a></div></div></section><section class="field field-name-field-publication-type field-type-taxonomy-term-reference field-label-above view-mode-rss"><h2 class="field-label">Publication Type:&nbsp;</h2><ul class="field-items"><li class="field-item even"><a href="/nanofabrics/publication-type/conference" typeof="skos:Concept" property="rdfs:label skos:prefLabel" datatype="">Conference</a></li></ul></section><section class="field field-name-field-vol-no- field-type-number-integer field-label-above view-mode-rss"><h2 class="field-label">Vol. No.:&nbsp;</h2><div class="field-items"><div class="field-item even">0</div></div></section><section class="field field-name-field-issue-no field-type-number-integer field-label-above view-mode-rss"><h2 class="field-label">Issue No.:&nbsp;</h2><div class="field-items"><div class="field-item even">0</div></div></section><section class="field field-name-field-pages field-type-text field-label-above view-mode-rss"><h2 class="field-label">pages:&nbsp;</h2><div class="field-items"><div class="field-item even">0</div></div></section><section class="field field-name-field-article-no- field-type-number-integer field-label-above view-mode-rss"><h2 class="field-label">Article No.:&nbsp;</h2><div class="field-items"><div class="field-item even">0</div></div></section><section class="field field-name-field-citation field-type-taxonomy-term-reference field-label-above view-mode-rss"><h2 class="field-label">citation:&nbsp;</h2><ul class="field-items"><li class="field-item even"><a href="/nanofabrics/conferencejournalbook/src-techcon" typeof="skos:Concept" property="rdfs:label skos:prefLabel" datatype="">SRC TECHCON</a></li></ul></section> Sun, 05 Jan 2014 00:33:48 +0000 Santosh Khasanvis 33 at https://www.umass.edu/nanofabrics https://www.umass.edu/nanofabrics/publication/integrated-nanowire-systems-post-cmos-computing#comments