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Graphene is an emerging nano-material that has garnered immense research interest due to its exotic electrical properties. It is believed to be a potential candidate for post-Si nanoelectronics due to high carrier mobility and extreme scalability. Recently, a new graphene nanoribbon crossbar (xGNR) device was proposed which exhibits negative differential resistance (NDR). In this paper, we present an approach to realize multistate memories, enabled by these graphene crossbar devices. We propose a ternary graphene nanoribbon tunneling volatile random access memory (GNTRAM) and implement it using a heterogeneous integration with CMOS transistors and routing. Benchmarking is presented with respect to state-of-the-art CMOS SRAM and 3T DRAM designs. Ternary GNTRAM shows up to 1.77x density-per-bit benefit over CMOS SRAMs and 1.42x benefit over 3T DRAM in 16nm technology node. Ternary GNTRAM is also up to 9x more power-efficient per bit against low-power CMOS SRAMs during stand-by, while maintaining comparable performance to high-performance designs. Thus GNTRAM has the potential to realize ultra-dense nanoscale memories exceeding those achievable by mere physical scaling. Further improvements may be possible by using graphene more extensively, as graphene transistors become available in future.