Architecting NP-Dynamic Skybridge

Publication Files

Publication Medium:

in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NanoArch)


pp. 169-174

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This paper introduces a new fine-grained 3D IC fabric technology called NP-Dynamic Skybridge. Skybridge is a family of 3D IC technologies that provides fine-grained vertical integration. In comparison to the original 3D Skybridge, the NP-Dynamic approach enables a more comprehensive logic style for improved efficiency. It addresses device, circuit, connectivity and manufacturability requirements with an integrated 3D mindset. The NP-Dynamic 3D circuit style enables wide range of logic expressions, simple clocking scheme, and reduces buffer requirements. Architected interconnect framework in 3D provides a high degree of connectivity. Bottom-up evaluations for 16-nm NP-Dynamic Skybridge, considering material properties, nanoscale transport, 3D circuit style, 3D placement and layout reveal up to 50x density and 25x power benefits for 4-bit CLA in comparison to 16-nm CMOS at comparable performance. For 4-bit multiplier, NP-Dynamic Skybridge shows up to 90x density benefit and 8x lower power vs. CMOS.