Architecting for Causal Intelligence at Nanoscale

Cognition and higher order reasoning in the human brain have been shown to adhere closely to probabilistic inference frameworks such as Bayesian networks that support reasoning under uncertainty. We architect a physically equivalent Bayesian network fabric with nanotechnology, employing inherently stochastic spintronic devices in unique recursive analog circuit structures that support Bayesian inference through physical fabric properties. This fabric approach results in many orders of magnitude efficiency improvements over conventional approaches and enables new cognitive applications with millions of random variables that are not possible today.

PDF icon PDF8.18 MB
PDF icon Supplementary-Doc1.68 MB

Architecting for Artificial Intelligence with Emerging Nanotechnology

Artificial Intelligence is becoming ubiquitous in products and services that we use daily. Although the domain of AI has seen substantial improvements over recent years, its effectiveness is limited by the capabilities of current computing technology. Recently, there have been several architectural innovations for AI using emerging nanotechnology. These architectures implement mathematical computations of AI with circuits that utilize physical behavior of nanodevices purpose-built for such computations. This approach leads to a much greater efficiency vs.

PDF icon PDF (In Press)1.32 MB

Structure Discovery for Gene Expression Networks with Emerging Stochastic Hardware

Gene Expression Networks (GENs) attempt to model how genetic information stored in the DNA (Genotype) results in the synthesis of proteins, and consequently, the physical traits of an organism (Phenotype). Deciphering GENs plays an important role in a wide range of applications from genetic studies of the origins of life to personalized healthcare. Probabilistic graphical models such as Bayesian Networks (BNs) are used to perform learning and inference of GENs from genetic data.

PDF icon PDF534.29 KB

Magneto-electric Approximate Computational Circuits for Bayesian Inference

Probabilistic graphical models like Bayesian Networks (BNs) are powerful cognitive-computing formalisms, with many similarities to human cognition. These models have a multitude of real-world applications. New emerging-technology based circuit paradigms leveraging physical equivalence e.g., operating directly on probabilities vs. introducing layers of abstraction, have shown promise in raising the performance and overall efficiency of BNs, enabling networks with millions of random variables.

PDF icon PDF986.8 KB

Unconventional Nanocomputing with Physical Wave Interference Functions

In this chapter, we introduce a new fully generic computational paradigm for post-CMOS integrated circuits based on emerging wave-like physical phenomenon (e.g. spin waves), called Wave Interference Functions (WIF). Waves offer new features and opportunities for logic circuits with inherent support for multi-valued data representation, communication and computation. Multi-valued information processing occurs through wave interference, and multi-valued communication between processing elements is through wave propagation.

PDF icon Book Chapter4.2 MB

Wave Interference Functions for Neuromorphic Computing

Neuromorphic computing mimicking the functionalities of mammalian brain holds the promise for cognitive capabilities enabling new intelligent applications. However, research efforts so far mainly focused on using analog and digital CMOS technologies to emulate neural activities, and are yet to achieve expected benefits. They suffer from limited scalability, density overhead, interconnection bottleneck and power consumption related constraints. In this paper, we present a transformative approach for neuromorphic computing with Wave Interference Functions (WIF).

PDF icon PDF1.31 MB

Physically Equivalent Magneto-Electric Nanoarchitecture for Probabilistic Reasoning

Probabilistic machine intelligence paradigms such as Bayesian Networks (BNs) are widely used in critical real-world applications. However they cannot be employed efficiently for large problems on conventional computing systems due to inefficiencies resulting from layers of abstraction and separation of logic and memory. We present an unconventional nanoscale magneto-electric machine paradigm, architected with the principle of physical equivalence to efficiently implement causal inference in BNs.

PDF icon PDF660.57 KB

Wave-based Multi-valued Computation Framework

We present a novel multi-valued computation framework called Wave Interference Functions (WIF), based on emerging non-equilibrium wave phenomenon such as spin waves. WIF offers new features for data representation and computation, which can be game changing for post-CMOS integrated circuits (ICs). Information encoding wave attributes inherently leads to multi-dimensional multi-valued data representation and communication. Multi-valued computation is natively supported with wave interactions, such as wave superposition or interference.

PDF icon PDF566.11 KB

Towards Logic Functions as the Device

This paper argues for alternate state variables and new types of sophisticated devices that implement more functionality in one computational step than typical devices based on simple switches. Elementary excitations in solids enabling wave interactions are possible initial candidates to create such new devices. The paper focuses on magnon-based spin-wave-logic functions (SPWF) and presents high fan-in majority, weighted high fan-in majority, and frequency-multiplexed weighted high fan-in majority devices as initial SPWFs.

PDF icon PDF527.39 KB

Embedded Processors based on Spin Wave Functions (SPWFs)

Spin Wave Functions (SPWFs) realize computation with spin waves, offering several benefits and new features over CMOS. SPWF technology potentially opens up new directions for designing microprocessors with increased capabilities over current implementations. Towards this end, as a preliminary work an 8-bit embedded processor is explored here using SPWFs and evaluated in terms of its power, area and performance using analytical estimates. A CMOS 8-bit processor implemented in an equivalent technology node is synthesized with CAD tools for comparison.

PDF icon PDF223.26 KB


Subscribe to RSS - Spin