Workshop on Power-Aware Computer Systems (PACS)

Runtime Biased Pointer Analysis and Its Application on Energy Efficiency

Compiler-enabled memory systems have been successful in reducing chip energy consumption. A major challenge lies in their applicability in the context of complex pointer-intensive programs. State-of-the-art high precision pointer analysis techniques have limitations when applied to such programs, and therefore have restricted use. This paper describes runtime biased pointer reuse analysis to capture the behavior of pointers in programs of arbitrary complexity.

PDF icon PDF140.96 KB

Energy-Aware Data Prefetching for General-Purpose Programs

There has been intensive research on data prefetching focusing on performance improvement, however, the energy aspect of prefetching is relatively unknown. Our experiments show that although software prefetching tends to be more energy efficient, hardware prefetching outperforms software prefetching on most of the applications in terms of performance. This paper proposes several techniques to make hardware-based data prefetching power-aware. Our proposed techniques include three compiler-based approaches which make the prefetch predictor more power efficient.

PDF icon PDF153.54 KB
Subscribe to RSS - Workshop on Power-Aware Computer Systems (PACS)