in Proceedings of IEEE International Conference on Nanotechnology (IEEE NANO)
Towards Defect-Tolerant Nanoscale Architectures
Image Processing Architecture for Semiconductor Nanowire based Fabrics
Manufacturing Pathway and Associated Challenges for Nanoscale Computational Systems
Impact of Process Variation on NASIC Nanoprocessors with 2-way Redundancy
3-D Integration Requirements for Hybrid Nanoscale-CMOS Fabrics
Integrated Nanosystems with Junctionless Crossed Nanowire Transistors
On-Chip Variation Sensor for Systematic Variation Estimation in Nanoscale Fabrics
N3ASIC Based Nanowire Volatile RAM
Post-CMOS Hybrid Spin-Charge Nanofabrics
