Welcome to the Nanoscale Computing Fabrics Laboratory at the Dept. of Electrical and Computer Engineering at the University of Massachusetts Amherst. This group is led by Prof. Csaba Andras Moritz. Our research addresses the fundamental problem of how to realize computation with nanotechnology. Our focus is on post-CMOS nanoscale fabrics and associated models of computation, based on emerging nanodevices (nanowire, spintronics, and graphene) and novel nanomanufacturing paradigms. We follow a 'fabric-centric' mindset - an integrated approach across various design levels (architecture, circuits, devices and manufacturing at nanoscale), leveraging the unique properties of new nanomaterials/nanodevices/physical phenomena. We do experimental (Cleanroom) work in addition to detailed cross-layer theoretical exploration.

Ongoing work ranges across 3-D fine-grained integrated circuits for post-CMOS digital logic, non-Von Neumann architectures for probabilistic Bayesian and neuromorphic computation with nanotechnology. Earlier projects included 2D nanowire fabrics for logic and memory (NASICs, N3ASICs, NWRAM), Spin-Wave Functions and Hybrid Graphene-CMOS multistate memory.

Research Projects

3-D Integrated Nanowire Fabric beyond CMOS

The research on 3-D integrated nanowire fabric focuses on transformative new ways to integrate novel devices and structures in vertical nanowires to achieve functional circuits, while maintaining manufacturability; in this fabric, features are architected to solve circuit, connectivity and thermal management issues in an integrated manner. Currently, the research details and outcomes are pending publications; more details will be coming soon.

Spin Wave Functions (SPWF)

In this project, we propose an approach called Spin Wave Functions (SPWFs) where computation is through wave superposition for practical and compact implementation of ultra-low power, high fan-in complex computational units. Electron spin is the state variable and communication among processing elements is accomplished via collective excitation of spins (also called as spin wave). No charge transport for communication and computation implies orders of magnitude lower power than conventional approaches such as CMOS.

Heterogeneous Graphene Nanoribbon-CMOS Multistate Memory (GNTRAM)

We propose a multistate memory capable of storing more than 1 bit in a given cell to overcome the slowdown in area-scaling of CMOS SRAM at nanoscale. This is enabled by novel graphene nanoribbon crossbars (xGNRs) which exhibit Negative Differential Resistance (NDR). These xGNR devices arranged in a grid-structure lead to a memory element with multiple stable states. This is used to build a memory cell in conjunction with MOS transistors for access, control and routing.

Nanoscale Application Specific Integrated Circuits (NASIC, N3ASIC, NWRAM)

We explore nanowire-based computing fabrics (NASICs, N3ASICs and NWRAM) for integrated circuit logic and memory. These fabrics are based on an integrated approach spanning multiple design levels including devices, circuits, architecture and manufacturing. Manufacturing challenges, e.g., overlay and registration, are mitigated through careful design choices at multiple levels of abstraction.